Right Transmit Holding Register 0
| RRBRX | The right stereo data received serially from the receive channel input (SDI) is read through this bit field. If the RX FIFO is full and the two-stage read operation (for instance, read from the I2S_LRBR0[LRBRX] bit field followed by a read from the I2S_RRBR0[RRBRX] bit field) is not performed before the start of the next stereo pair, then the new data is lost and an overrun interrupt occurs (data already in the RX FIFO is preserved). Note: Prior to reading this bit field, the left stereo data must be read from the I2S_LRBR0[LRBRX] bit field, or the status (interrupts) will not be valid. |